HAT: Hardware-Aware Transformers for Efficient Natural Language Processing

Computation and Language


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Transformers are ubiquitous in Natural Language Processing (NLP) tasks, but they are difficult to be deployed on hardware due to the intensive computation. To enable low-latency inference on resource-constrained hardware platforms, we propose to design Hardware-Aware Transformers (HAT) with neural architecture search. We first construct a large design space with arbitrary encoder-decoder attention and heterogeneous layers. Then we train a SuperTransformer that covers all candidates in the design space, and efficiently produces many SubTransformers with weight sharing. Finally, we perform an evolutionary search with a hardware latency constraint to find a specialized SubTransformer dedicated to run fast on the target hardware. Extensive experiments on four machine translation tasks demonstrate that HAT can discover efficient models for different hardware (CPU, GPU, IoT device). When running WMT’14 translation task on Raspberry Pi-4, HAT can achieve 3× speedup, 3.7× smaller size over baseline Transformer; 2.7× speedup, 3.6× smaller size over Evolved Transformer with 12,041× less search cost and no performance loss.

This paper has been published at ACL 2020

Please cite our work using the BibTeX below.

      title={HAT: Hardware-Aware Transformers for Efficient Natural Language Processing}, 
      author={Hanrui Wang and Zhanghao Wu and Zhijian Liu and Han Cai and Ligeng Zhu and Chuang Gan and Song Han},
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